Chips with everything? Could you win big in the RISC-V revolution?

The rise of RISC-V seems inexorable. It’s being touted as an answer to the drastic slowing of Moore’s law. It’s promising SoC developers freedom from the expense and restrictions of Intel, ARM and x86 with a new and flexible chip architecture. It’s promising to unleash innovation. But will you win big in the RISC-V revolution?

RISC-V is the open standard instruction set architecture (ISA) hailed as a new era of freedom for hardware developers:

“With semiconductor scaling failing, the only way to provide increase in computational performance is specialization. The open RISC-V ISA is modular and supports custom instructions making it the ideal ISA to create a wide range of specialized processors and accelerators”.

Roddy Urquhart - Codasip.

The growth potential is huge.

Within 5 years, Semico Research predicts that RISC-V will ‘capture 15% of total revenue in the market for CPU core design’ - an incredible commercial rise for an ISA that a few years ago was just a glint in an academic’s eye.

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Where did it all start?

Initially developed as a teaching tool at UC Berkeley, the RISC-V core is designed to be as “simple, efficient and extensible” as possible. While most ISAs contain hundreds or even thousands of instructions, RISC-V contains a core of just 47, making it more straightforward to understand and master. Crucially, its extensible architecture means developers can edit and add functions as required. This is paving the way for ever smaller, more efficient and specialised microprocessors which the industry needs to power IoT, medical devices, AI Machine Learning and many other cutting edge technologies.

RISC-V’s open-source status is speeding its growth among developers hungry for more efficient and cost-effective processing power. It’s offering more choice around licensing models. It’s also attracting interest from Indian and Chinese firms who want to free themselves from their dependency on US companies.

Why are developers so excited about RISC-V?

Before now, with the stranglehold that Intel and ARM traditionally had on processor architectures, going it alone and building your own chips had not been an option for most SoC developers. This was holding back innovation, forcing developers to use off-the-shelf solutions that didn’t do precisely what they needed, but were ‘good enough’. Those who wanted to customise chips may have turned to ARM for chip designs they could license and adapt in a limited way. But the cost of maintaining designs and paying royalties was prohibitive for all but the biggest players.

Developers were champing at the bit for alternatives, but other solutions had drawbacks of their own. Companies who tried, independently, to implement their own version of the established processor ISAs have been on the receiving end of punitive legal action. Meanwhile, most open-source solutions for chip development have not seen the take-up required to spearhead a revolution.

Until now.

RISC-V breaks away from the pack

In recent years RISC-V has broken from the pack of failed or stalled open-source ISAs and established itself as the solution to watch. Commentators once may have been asking if RISC-V really was capable of thriving, with so many hostile incumbents to battle, but now its place in the future tech landscape seems more assured.

The RISC-V Foundation and its community, have built a formidable network of collaborators, materials, and support for developers who go down this path. They have taken steps to prevent fragmentation, assuring the security and overall sustainability of the architecture.

“The organization currently has dozens of technical working groups making sure the RISC-V architecture plays well with various standards, addresses the needs of multiple chip applications, and allows for strong chip security.”

Source: Spectrum

In the last few years, major players like Intel have declared support for the project, lending heavyweight credibility and funding to its future. Right now, billions are being ploughed into RISC-V projects.

What kind of growth is projected in the RISC-V space?

According to Deloitte, RISC-V revenue will likely reach close to US$800 million in 2023, up from less than US$400 million in 2021, and is expected to approach US$1 billion by 2024.

There is an opportunity here for those who want to run with it. Intense interest exists in its application for AI, Machine Learning, and IoT, as well as med-tech and autonomous vehicles.

The need is there; the support is there; the ideas and engineering expertise are there. RISC-V looks like it can deliver for many industries and markets.

What are the challenges?

RISC-V may be sold as a liberating force in the SoC market, but mastering the technology and harnessing it for use in cutting edge applications is not promising to be cheap or easy.

It will take teams years of work, hundreds of millions of dollars and huge amounts of processing power to develop some of these chips and bring them to market.

There are enormous engineering and governance implications involved in their micro-architecture, implementation and verification. Making changes to open-source ISA requires vigilance to ensure they don’t impact overall performance or cause other parts of the design to malfunction. Validation and verification become even more critical for processors destined for use in autonomous vehicles and devices.

Producing chips that are compliant with ISO 26262, ISO 13485, and many other risk management and safety-focused software regulations can slow down or completely scupper your journey to market if you’re not adequately prepared.

And given how expensive developing chips currently is, this could easily ruin even an established business.

What’s the cost of developing chips?

The following chart from International Business Strategies (IBS) shows how, as chips are designed on smaller process geometries and become ever more powerful, expected design costs are escalating rapidly. In particular, verification, validation and IP qualification costs are ballooning.

As this article about chip design costs in Extreme Tech explains:

“Treating the “16nm” column as equivalent to the various 12/14/16nm chips that we’ve seen in-market thus far, it means a cost of roughly $100M to build a new GPU, CPU, or SoC. Even at 7nm, the design cost has tripled. But moving from 7nm to 3nm would mean increasing costs by a further factor of 5”

Governance and documentation loom large in the face of skyrocketing costs

But, considering the astronomical cost and associated risk of failure, the state of governance in the industry is surprisingly variable. Yes, some companies are arming themselves with the digital tools to control quality and process from ideation to launch of their expensive ventures.

But there are big companies in the RISC-V space whose development has stalled or slowed because they’ve underestimated the challenge involved in verification and documentation for this nascent architecture.

There’s a reason why Intel and ARM have held such a tight grip on the market (other than their jealously guarded IP, of course). Their technology is well designed, verified and validated, with systems and software developed for these tasks over decades. They are insulated from the risk of failure by layers of process and experience.

As demand grows for custom chips and the potential rewards grow for successful companies, laser-sharp commercial focus, governance, and speed of delivery will be everything.

Those who have not acknowledged the scale of the challenge ahead and prepared themselves with the right document and quality management systems, will likely never reap its rewards.